Measuring Operating System Overhead on Sun UltraSPARC T1 Processor
نویسندگان
چکیده
Numerous studies have shown that Operating System (OS) noise is one of the reasons for significant performance degradation in clustered architectures. Although many studies examine the OS noise for High Performance Computing, especially in multi-processor/core systems, most of them focus on 2or 4-core systems. In this study, we analyze sources of OS noise on a massive multithreading processor, the Sun UltraSPARC T1. We compare results, measured in Linux and Solaris, with the results provided by a low-overhead runtime environment that introduces almost no overhead in applications’ execution time. Our results show that the overhead introduced by the OS timer interrupt in Linux and Solaris depends on the particular core and hardware context in which the application is running. This overhead is up to 30% when the application is executed on the same hardware context as the timer interrupt handler, and up to 10% when the application and the timer interrupt handler run on different contexts but on the same core. We detect no overhead when the benchmark and the timer interrupt handler run on different cores of the processor.
منابع مشابه
Reliability Enhancement of Multi-Core Processors using Machine-Learning Techniques
As a result of technology scaling, power density of multi-core chips increases and leads to temperature hotspots which accelerate device aging and chip failure. Moreover tremendous efforts to reduce power consumption by employing low-power techniques decreases the reliability of new design generation. In this work, we first discuss the state-of-the-art methods for predicting workload dynamics a...
متن کاملUnderstanding the overhead of the spin-lock loop in CMT architectures
Spin locks are a synchronization mechanisms used to provide mutual exclusion to shared software resources. Spin locks are used over other synchronization mechanisms in several situations, like when the average waiting time to obtain the lock is short, in which case the probability of getting the lock is high, or when it is no possible to use other synchronization mechanisms. In this paper, we s...
متن کاملDesignCon 2007 UltraSPARC Processor Emulation Verification: Getting HW/SW right the first time
With reduced time-to-market and highly competitive marketplace, it is now important, more than ever, to get the product right the first time! And this is no different for latest generation CoolThreads UltraSPARC T1 processor. The UltraSPARC T1 processor represents one of the highest throughput and most eco-responsible processor featuring unique multi-core, multi-threaded design with up to 32 si...
متن کاملOpenSPARC – An Open Platform for Hardware Reliability Experimentation
TM T1 and T2 chip multi-threaded (CMT) microprocessors[1]. The UltraSPARC TM T2 processor is the industry's first "server on a chip", with 8 cores, 64 threads and on-chip networking and security. The richness of the RTL source code, tools and information in OpenSPARC has made it a comprehensive, practical and relevant platform for research in several areas of computing. This paper highlights th...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2009